کتابخانه

Features

• Provides instructions how to design different combinational, sequential, and arithmetic logic circuits using conventional methods and Verilog HDL.
• Presents the Verilog language together with a wide variety of examples so that the reader can gain a firm foundation in the design of digital systems using Verilog HDL.
• Includes examples on logical operations, counters of different moduli, half adders, full adders, a carry look ahead adder, array multipliers, different types of Moore and Mealy machines, and arithmetic logic units.
• Places emphasis on the detailed design of various Verilog projects including: design module, the test bench module, and the outputs obtained from the simulator that illustrate the complete functional operation of the design.
• Intended to be read as a tutorial, so it is comprehensive and self-contained.
• Each chapter includes numerous problems of varying complexity to be designed by the reader.

Summary

The Verilog language provides a means to model a digital system at many levels of abstraction from a logic gate to a complex digital system to a mainframe computer. The purpose of this book is to present the Verilog language together with a wide variety of examples, so that the reader can gain a firm foundation in the design of the digital system using Verilog HDL. The Verilog projects include the design module, the test bench module, and the outputs obtained from the simulator that illustrate the complete functional operation of the design. Where applicable, a detailed review of the theory of the topic is presented together with the logic design principles—including: state diagrams, Karnaugh maps, equations, and the logic diagram. Numerous examples and homework problems are included throughout. The examples include logical operations, counters of different moduli, half adders, full adders, a carry lookahead adder, array multipliers, different types of Moore and Mealy machines, and arithmetic logic units (ALUs).

Table of Contents

Preface

Chapter 1 Introduction to Logic Design Using Verilog HDL

1.1 Language Elements

1.2 Expressions

1.3 Modules and Ports

1.4 Built-In Primitives

1.5 User-Defined Primitives

1.6 Dataflow Modeling

1.7 Behavioral Modeling

1.8 Structural Modeling

1.9 Tasks and Functions

1.10 Problems

Chapter 2 Combinational Logic Design Using Verilog HDL

2.1 Number Systems

2.2 Boolean Algebra

2.3 Logic Equations

2.4 Multiplexers

2.5 Comparators

2.6 Programmable Logic Devices

2.7 Additional Design Examples

2.8 Problems

Chapter 3 Sequential Logic Design Using Verilog HDL

3.1 Introduction

3.2 Synchronous Sequential Machines

3.3 Asynchronous Sequential Machines

3.4 Pulse-Mode Asynchronous Sequential Machines

3.5 Problems

Chapter 4 Computer Arithmetic Design Using Verilog HDL

4.1 Introduction

4.2 Fixed-Point Addition

4.3 Fixed-Point Subtraction

4.4 Fixed-Point Multiplication

4.5 Fixed-Point Division

4.6 Arithmetic and Logic Unit

4.7 Decimal Addition

4.8 Decimal Subtraction

4.9 Decimal Multiplication

4.10 Decimal Division

4.11 Floating-Point Addition

4.12 Floating-Point Subtraction

4.13 Floating-Point Multiplication

4.14 Floating-Point Division

4.15 Problems

Appendix A Event Queue

Appendix B Verilog Project Procedure

Appendix C Answers to Select Problems

Index